TM-9-1290-365-24-P
PALADIN MUZZLE VELOCITY SYSTEM M93 UPGRADED
TECHNICAL MANUAL; UNIT, DIRECT SUPPORT, AND GENERAL SUPPORT MAINTENANCE MANUAL INCLUDING REPAIR PARTS AND SPECIAL TOOLS LIST
OCTOBER 2000
TM-9-1290-365-24-P - Page 39 of 334
ARMY TM 9-1290-365-24&P
1.19.5.4 TRANSCEIVER INTERFACE. The transceiver interface consists of several circuits,
which enable an interface between the module and the transceiver. These circuits consist of:
a. An X band interface which amplifies and reshapes the Doppler signal received from the
X band transceiver.
b. A precise synthetic Doppler frequency generated for self test purposes.
c. A trigger circuit for defining the instant of firing and activating the Transceiver.
d. A signal select circuit which transfers the required inputs for sampling and processing.
1.19.5.5 CLOCK GENERATOR, WAIT STATE, AND TIMING CIRCUITS. These circuits provide
all the necessary system clock, wait states, and other timing such as sampling rate for Doppler
signal and baud rate for serial communications.'
1.19.5.6 POWER CONTROL AND FAILURE CIRCUIT. This circuit provides the required reset
and power failure signals. The power failure signal is used to protect the data base memory
from being mistakenly overwritten during power on/off or failure. This circuit provides the system
the ability to operate properly upon input power disturbances (power decrease under 18 VDC)
caused by start up of other equipment. This is provided by a capacitor, which supplies the
power to the work memory (RAM) for the period of the power disturbance. The system current
mode of operation is stored in that memory. The processor checks that mode and continues
operation from the condition it was before the power disturbance occurred. If the power
disturbance lasts longer than 3.5 seconds, the M93 MVS resumes operation as if initially
powered-up.
1.19.5.7 DISCRETE I/O. Several discrete inputs/outputs are provided for general use.
1.19.5.8 ADDRESS DECODER. The address decoder decodes the various MVP module
component addresses when a read/write operation to them is required.
1.19.5.9 MIL-STD-1553B INTERFACE. The MIL-STD-1553B Interface is implemented using a
chip set which is based on the Aeroflex C12577-10-QM-P119 chip and associated circuitry. The
chip is capable of functioning as a remote terminal (RT) and contains dual low-power
transceivers and encoder/decoders, complete BC/RT protocol logic, 4 K x 16 shared static RAM
and a direct buffered interface to the host processor bus. The CT2577-10-QM-P119 in the RT
mode is able to be addressed within the address range 00001 through 11110 by using the
RTADO - RTAD4 and RTADP lines.
1.19.5.10 AUTOMATIC FIRE DETECTION CIRCUIT. The MVP contains an acceleration switch,
which detects the instant of gun firing and provides the command to start the measuring
process (to start RF transmission and signal sampling).
1-19
Back to Top
